1. Field of the Invention
This invention relates to demodulators, and more specifically to reduced complexity demodulators for continuous phase modulation waveforms.
2. Background and Material Information
Continuous phase modulation (CPM) techniques modulate the phase of a carrier. This differs from modulation techniques that modulate the amplitude or frequency. Minimum Shift Keying (MSK), and Gaussian Minimum Shift Keying (GMSK), are examples of continuous phase modulation techniques. Other phase modulation techniques include Binary Shift Keying (BPSK) and Quaternary Phase Shift Keying (QPSK). Each of these techniques has its own advantages and drawbacks. For example, both BPSK and QPSK modulations exhibit a power spectral density (PSD) with large side lobes that may cause adjacent channel interference (ACI). The utilization of a filtering process to reduce the sides lobes may introduce interference between the symbols in the same frequency (intersymbol interference (ISI)) and additional system complexity.
Therefore, developers of communication systems have turned to modulation schemes that are already bandwidth efficient as opposed to using filtering to remove side lobes and attain bandwidth efficiency. A more bandwidth efficient modulation, such as MSK, eliminates step changes in the phase of the transmitted waveform and is, therefore, noted as a CPM. Pre-modulation filtering, such as GMSK, will eliminate step changes in the frequency of the transmitted waveform. For GMSK, a controlled amount of ISI is introduced into the waveform and symbols are transmitted as gradual changes in phase. The result is that the GMSK waveform has a power spectral density (PSD) that falls off extremely quickly, therefore, allowing frequency channels to be packed closely together.
GMSK and other CPMs enable the information carrying capacity and bandwidth efficiency of a communication system to be increased. However, one consequence of this waveform is that it requires significant computation to perform the data detection/demodulation. The computation requirement increases the number of gates in logic circuits designed to perform the detection. If the logic circuits are implemented in an application specific integrated circuit (ASIC), the size of the ASIC required to perform the detection is driven by the computation requirements. The number of gates in the ASIC drives the power requirement for the demodulator. Each reduction in complexity of the demodulator not only decreases the cost of the communication system, but also increases the reliability, manufacturability, and maintainability of the communication system.
Conventional methods to perform data detection involve more complicated computational procedures such as the Viterbi algorithm, or some type of matched filtering and Wiener filtering, or other equalization/approximation filters. The implementation of the Viterbi algorithm requires a feedback loop to compare all the possible branch metrics. At a high data rate, the latency in this critical loop becomes a problem. Advanced filtering techniques require multiplication operations, which are relatively expensive to implement in logic gates or ASICs. Therefore, there is a need for a new, computationally efficient data detection approach that may be realized in hardware with a minimal number of gates.
Accordingly, the present invention is directed to demodulators for continuous phase modulation waveforms that substantially obviate one or more of the problems arising from the limitations and disadvantages of the related art.
The present invention includes a method for demodulating a signal that includes: receiving a modulated sampled signal; buffering a consecutive sequence of the modulated sampled signal; comparing the consecutive sequence with all possible valid modulated sampled signals; and determining a bit decision representing a demodulation of the consecutive sequence of the modulated sampled signal, the determination made based on a valid modulated sampled signal located closest to the consecutive sequence of the modulated sample signal in a constellation.
The modulated sampled signal may be a GMSK signal. The consecutive sequence of the modulated sampled signal may be quantized before the buffering, thereby forming quantized sequential signals. The quantized sequential signals may be used in the comparing. The quantized sequential signals may be concatenated to form a part of an address to a memory. The address and memory may be used in the determining. Bit decisions representing demodulation of all possible consecutive sequences of the modulated sampled signal may be stored in the memory. The address may be used to access the bit decision representing a demodulation of the consecutive sequence of the modulated sampled signal.
Output from a counter may be used as part of the address to the memory. The consecutive sequence of the modulated sampled signal may be consecutive phase locations of the modulated sampled signal. The consecutive phase locations of the modulated sampled signal may be four consecutive phase locations. The comparing may include measuring the distance between the consecutive sequence and each of valid modulated sampled signals. The distance between the consecutive sequence and each valid modulated sampled signal may be measured by the difference between phases of the consecutive sequence and each valid modulated sampled signal. The distance between the consecutive sequence and each valid modulated sampled signals may be measured by the cosine of a phase difference between the consecutive sequence and each valid modulated sampled signal.
The present invention further includes a method for demodulating a modulated signal that may include: receiving at least one modulated input waveform; determining all possible valid modulated waveforms; comparing the received at least one modulated input waveform with the possible valid modulated waveforms; and determining bit decisions representing a demodulation of the at least one modulated input waveform where each bit decision may represent the valid modulated waveform closest to each received at least one modulated input waveform.
The at least one modulated input waveform may be a GMSK waveform. The at least one modulated input waveform may be quantized thereby forming quantized sequential signals. The quantized sequential signals may be concatenated to form a part of an address to a memory. The bit decisions may be stored in the memory. The address may be used to access the bit decisions representing a demodulation of the at least one modulated input waveform.
The present invention also includes a demodulator that may include a quantizer where the quantizer receives an input modulated waveform. The quantizer may quantize the input modulated waveform producing quantized data. The demodulator may also include a t least one memory device operatively connected to the quantizer where the at least one memory device contains bit decisions representing a demodulation of the input modulated waveform. The quantized data may be used to form an address to the at least one memory.
The demodulator may include at least one buffer where the at least one buffer is operatively connected between the quantizer and the at least one memory device. The at least one buffer may form a memory address using the quantized data and send the memory address to the at least one memory device to obtain the bit decisions. The demodulator may include at least one counter operatively connected to the at least one memory device. The output from the at least one counter may be used as part of the memory address to access the bit decisions. Each at least one buffer may be a shift register. The at least one memory device may be a ROM or a RAM. The quantizer may be an angle quantizer.
The present invention further includes a method for demodulating a signal that includes: identifying characteristics of a modulated input waveform; determining a finite number of values in a nominal constellation representing all possible valid values for the modulated input waveform; determining an approximate phase constellation of valid values for the modulated input waveform based on a location or groupings of the values for the modulated input waveform in the nominal phase constellation, wherein the number of valid values for the modulated input waveform in the approximate phase constellation may be less than the number of values for the modulated input waveform in the nominal phase constellation; determining all possible values for the modulated input waveform with noise; comparing each possible value for the modulated input waveform with noise with the valid values for the modulated input waveform; assigning a bit decision representing each valid value for the modulated input waveform closest to each possible value for the modulated input waveform with noise for all possible values for the modulated input waveform with noise; storing the bit decisions in a memory device; receiving a set number of consecutive modulated input waveforms with noise; quantizing each received set number of consecutive modulated input waveforms with noise; forming a memory address from bits representing each quantized set number of consecutive modulated input waveforms with noise and output from a counter; and outputting the bit decision representing a demodulation of the set number of consecutive modulated input waveforms, the bit decision is outputted from the memory address of the memory device.
Other exemplary embodiments and advantages of the present invention may be ascertained by reviewing the present disclosure and the accompanying drawings.